An international research team has successfully synthesized a high-performance two-dimensional p-type semiconductor, marking a significant milestone in the ongoing effort to overcome the physical limitations of conventional silicon-based electronics. Led by Chou Yi-chia, a professor at National Taiwan University, the collaborative effort published its findings in the journal Nature, detailing a novel material composed of boron, carbon, and nitrogen atoms.
Modern complementary metal-oxide-semiconductor technology relies on the precise pairing of n-type and p-type semiconductors to manage electrical current and minimize power consumption. While n-type 2D materials have seen substantial development, the industry has long struggled to produce p-type counterparts that maintain high electrical performance at scale. This disparity has created a persistent bottleneck in the design of next-generation 3D integrated circuits and advanced transistor arrays.
The research team, which included collaborators from the University of Tokyo and Academia Sinica’s Research Center for Applied Sciences, utilized an atomic-scale design approach to modify the electronic properties of single-layer boron nitride. By strategically introducing carbon atoms into the lattice to replace nitrogen, the scientists successfully engineered a material that conducts electricity primarily through positively charged holes. This structural modification is essential for achieving the necessary hole mobility required for high-speed electronic switching.
Scaling the production of 2D materials often presents significant challenges regarding uniformity and chemical stability. To address this, the researchers controlled the chemical reaction pathways of two specific precursor molecules, which allowed for the synthesis of the material on two-inch wafers. This capability is a prerequisite for the practical manufacturing of transistor arrays, as it ensures the material can be integrated into existing fabrication workflows.
The team achieved this synthesis by precisely managing the substitution of nitrogen atoms within the boron nitride lattice, effectively tuning the electronic band structure to favor hole-based transport. This atomic-level manipulation of the crystal lattice ensures that the resulting semiconductor maintains its p-type characteristics across the entire surface of the wafer. Such control over the chemical vapor deposition process is critical for producing the uniform thin-film layers required for reliable device performance.
Experimental testing confirmed the viability of the new material, yielding a hole mobility of approximately 100cm2 per volt-second. The on-off current ratio reached about 100 million to one, a metric that indicates high efficiency in switching operations. The team validated these results by evaluating 224 individual transistors across three separate production batches, reporting consistent electrical characteristics throughout the samples.
Vincent Tung of the University of Tokyo and Pao Chun-wei of Academia Sinica served as co-leads alongside Chou, with postdoctoral researcher Huang Chang-hsun contributing as a co-first author. The team emphasized that their methodology allows for precise control over the carbon atom placement, which provides a mechanism for further tuning the material’s electronic bandgap. This level of control is vital for optimizing performance in specific device applications.
The development of this p-type semiconductor provides a missing piece for the creation of fully 2D complementary circuits. By combining this new material with existing n-type 2D semiconductors such as molybdenum disulfide, engineers can now envision the construction of logic gates and memory components that are thinner and more efficient than current standards. This architectural shift could enable a new class of ultra-compact electronic devices that operate with significantly lower power requirements.
The integration of p-type and n-type 2D materials represents a fundamental shift in how designers approach the scaling of electronic components. By moving away from bulk silicon toward atomic-layer structures, the industry can potentially bypass the short-channel effects that currently plague sub-nanometer transistor designs. This research provides the necessary material foundation to realize such high-density, low-power architectures in future computing hardware.
Future research will likely focus on refining the deposition processes to further improve carrier mobility and device reliability. As the industry moves toward smaller nodes, the ability to integrate these 2D materials into existing 3D architectures will remain a primary watchpoint for semiconductor manufacturers. The successful demonstration of this material on a wafer-scale platform suggests that the transition from laboratory research to industrial prototyping may be closer than previously anticipated.